Tortuga Logic is working on a DARPA research project in the US to test security vulnerabilties on emulation platforms that are used to develop and test chip designs. This would allow designers to identify and correct vulnerabilities before the chips are made.
Tortuga has developed hardware security models that identify vulnerabilities in semiconductor designs, and the project would allow that technology to be used to fully test an entire chip design running a full software stack.
The iniital work will be done on the Palladium platform from Cadence Design Systems using the RISC-V processor architecture and sample design for initial prototyping and testing. As we have noted in the Embedded blog, RISC-V is gaining popularity in many market verticals and will be used as the baseline design for many of the project participants, making it a suitable architecture to validate the functionality of the final security emulation platform.
The results of the project would be used by hardware designers to enhance their ability to find security vulnerabilities in their designs prior to chip fabrication or Field-Programmable Gate Array (FPGA) deployment. The project will be led by Dr. Jason Oberg, Tortuga Logic’s CEO and co-founder.
“More than ever, hardware designers need solutions to identify security vulnerabilities throughout the chip design lifecycle, rather than post-fabrication or post-deployment. This contract with DARPA will allow Tortuga Logic to integrate our patented information flow technology with commercial emulation platforms, completing a full end-to-end design suite dedicated to security verification,” saidOberg.
Members of the System Security Integrated Through Hardware and Firmware” (SSITH) program will receive early access to the resulting security solution for emulation platforms.
“More than ever, hardware designers need solutions to identify security vulnerabilities throughout the chip design lifecycle, rather than post-fabrication or post-deployment. This contract with DARPA will allow Tortuga Logic to integrate our patented information flow technology with commercial emulation platforms, completing a full end-to-end design suite dedicated to security verification,” saidOberg.
Members of the System Security Integrated Through Hardware and Firmware” (SSITH) program will receive early access to the resulting security solution for emulation platforms.
Tortuga Logic’s current product line consists of two software suites, Prospect and Unison. Both products have been adopted within the semiconductor industry, as well as the aerospace and defence industry.
The teechnology will be managed by Tortuga Logic’s recently appointed VP of Engineering Andrew Dauman, a former Vice President at Synopsys responsible for the Synplify family of FPGA synthesis tools, as well as the HAPS FPGA-based prototyping systems.
Tortuga’s security solution for emulation platforms will be available for purchase later this year.
Tortuga’s security solution for emulation platforms will be available for purchase later this year.
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